EBOOK - Digital Design and Verilog HDL Fundamentals (Joseph Cavanagh)

EBOOK - Thiết kế kỹ thuật số và Các nguyên tắc cơ bản về HDL của Verilog (Joseph Cavanagh) - 1154 Trang.

The field of digital logic consists primarilyof the analysis and synthesis of combinational logic circuits and sequential logic circuits, also referred to as finite-state machines. The principal characteristic of combinational logic is that the outputs are a function of the present inputs only, whereasthe outputs of sequential logic are a function of the input sequence; that is, the input history.
Sequential logic, therefore, requires storage elements which indicate the present state of the machine relative to a unique sequence of inputs.

Sequential logic is partitioned into synchronous and asynchronous sequential machines. Synchronous sequential machines are controlled by a system clock which provides the triggering mechanism to cause state changes. Asynchronous sequential machines have no clocking mechanism — the machines change state upon the application of input signals. The input signals provide the means to enable the sequential machines to proceed through a prescribed sequence of states.
The purpose of this book is to provide a thorough exposition of the analysis and synthesis of combinational and sequential logic circuits, where sequential logic consists of synchronous and asynchronous sequential machines. Emphasis is placed on structured and rigorous design principles that can be applied to practical applications. Each step of the analysis and synthesis procedures is clearly delineated. Each method that is presented is expounded in sufficient detail with several accompanying examples.
The Verilog hardware description language (HDL) is used extensively throughout the book for both combinational and sequential logic design. Verilog HDL is an Institute of Electrical and Electronics Engineers (IEEE) standard: 1364-1995. The book concentrates on combinational and sequential logic design with emphasis on the detailed design of various Verilog HDL projects. The examples are designed first using traditional design techniques, then implemented using Verilog HDL. This allows the reader to correlate and compare the two design methodologies.
The book is intended to be tutorial, and as such, is comprehensive and self contained. All designs are carried through to completion — nothing is left unfinished or partially designed. Each chapter includesnumerous problems of varying complexity to be designed by the reader, including both traditional logic design techniques and Verilog HDL design techniques in appropriate chapters. The Verilog HDL designs include the design module, the test bench module which tests the design for correct functionality, the outputs obtained from the test bench, and the waveforms obtained from the test bench.

Chapter 1 Number Systems, Number Representations,
and Codes1
1.1 Number Systems 1
1.1.1 Binary Number System 4
1.1.2 Octal Number System 7
1.1.3 Decimal Number System 9
1.1.4 Hexadecimal Number System 10
1.1.5 Arithmetic Operations 12
1.1.6 Conversion Between Radices 22
1.2 Number Representations 29
1.2.1 Sign Magnitude 29
1.2.2 Diminished-Radix Complement 31
1.2.3 Radix Complement 34
1.2.4 Arithmetic Operations 38
1.3 Binary Codes 59
1.3.1 Binary Weighted and Nonweighted Codes 59
1.3.2 Binary-to-BCD Conversion 63
1.3.3 BCD-to-Binary Conversion 64
1.3.4 Gray Code 65
1.4 Error Detection and Correction Codes 68
1.4.1 Parity 68
1.4.2 Hamming Code 70
1.4.3 Cyclic Redundancy Check Code 72
1.4.4 Checksum 73
1.4.5 Two-Out-Of-Five Code 75
1.4.6 Horizontal and Vertical Parity Check 75
1.5 Serial Data Transmission 77
1.6 Problems 78
Chapter 2 Minimization of Switching Functions 83
2.1 Boolean Algebra 83
2.2 Algebraic Minimization 92
2.3 Karnaugh Maps 95
2.3.1 Map-Entered Variables 113
2.4 Quine-McCluskey Algorithm 118
2.4.1 Petrick Algorithm 123
2.5 Problems 128


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